Prodotti della ricerca

 

UNICA IRIS Institutional Research Information System

IRIS è il sistema di gestione integrata dei dati della ricerca (persone, progetti, pubblicazioni, attività) adottato dall'Università degli Studi di Cagliari dal mese di luglio 2015.

Mostra risultati da 21 a 40 di 60
successivo >  < precedente 
TitoloData di pubblicazioneAutore(i)RivistaEditore
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation2016Meloni, Paolo; Palumbo, Francesca; Rubattu, Claudio; Tuveri, Giuseppe; Pani, Danilo; Raffo, LuigiMICROPROCESSORS AND MICROSYSTEMS
Power and clock gating modelling in coarse grained reconfigurable systems2016Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, Luigi; Palumbo, FrancescaACM
Modelling and automated implementation of optimal power saving strategies in coarse-grained reconfigurable architectures2016Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Meloni, Paolo; Raffo, LuigiJOURNAL OF ELECTRICAL AND COMPUTER ENGINEERING
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding2015Meloni P; Tuveri G; Pani D; Raffo L; Palumbo FIEEE
Power Modelling for Saving Strategies in Coarse Grained Reconfigurable Systems2015Fanni T; Sau C; Meloni P; Raffo L; Palumbo F
Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain2015Sau C; Fanni L; Meloni P; Raffo L; Palumbo F
Online process transformation for polyhedral process networks in shared-memory MPSoCs2014Meloni P; Tuveri G; Raffo L; Loi I; Conti FIEEE
A custom MPSoC architecture with integrated power management for real-time neural signal decoding2014Carta N; Meloni P; Tuveri G; Pani D; Raffo LIEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
A stream buffer mechanism for pervasive splitting transformations on polyhedral process networks2014Meloni P; Tuveri G; Raffo L; Loi I; Conti FACM INTERNATIONAL CONFERENCE PROCEEDINGS SERIESACM Digital Library
The multi-dataflow composer tool: generation of on-the-fly reconfigurable platforms2014Palumbo F; Carta N; Pani D; Meloni P; Raffo LJOURNAL OF REAL-TIME IMAGE PROCESSING
A runtime adaptive H.264 video-decoding MPSoC platform2013Tuveri G; Secchi S; Meloni P; Raffo L; Cannella EIEEE
A low overhead self-adaptation technique for KPN applications on NoC-based MPSoCs2013Derin O; Ramankutty P; Meloni P; Tuveri GIEEE
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project2013Derin O; Cannella E; Tuveri G; Meloni P; Stefanov T; Fiorin L; Raffo L; Sami MMICROPROCESSORS AND MICROSYSTEMS
ASAM: Automatic architecture synthesis and application mapping2013Jozwiak L; Lindwer M; Corvino R; Meloni P; Micconi L; Madsen J; Diken E; Gangadharan D; Jordans R...; Pomata S; Pop P; Tuveri G; Raffo L; Notarangelo GMICROPROCESSORS AND MICROSYSTEMS
Enabling fast ASIP design space exploration: An FPGA-based runtime reconfigurable prototyper2012Meloni P; Pomata S; Tuveri G; Secchi S; Raffo L; Lindwer MVLSI DESIGN
System adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project approach2012Meloni P; Tuveri G; Raffo L; Cannella E; Stefanov T; Derin O; Fiorin L; Sami MIEEE
FPGA-Based Emulation Support for Design Space Exploration2012Meloni P; Secchi S; Raffo LJohn Wiley & Sons, Inc.
Exploiting binary translation for fast ASIP design space exploration on FPGAs2012Pomata S; Meloni P; Tuveri G; Raffo L; Lindwer MIEEE
Combining on-hardware prototyping and high-level simulation for DSE of multi-ASIP systems2012Meloni P; Pomata S; Raffo L; Piscitelli R; Pimentel AD
Adaptivity support for MPSoCs based on process migration in polyhedral process networks2012Cannella E; Derin O; Meloni P; Tuveri G; Stefanov TVLSI DESIGN
   
credits unica.it | accessibilità Università degli Studi di Cagliari
C.F.: 80019600925 - P.I.: 00443370929
note legali | privacy

Nascondi la toolbar